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authorAngel Pons <th3fanbus@gmail.com>2021-04-17 14:34:37 +0200
committerAngel Pons <th3fanbus@gmail.com>2021-04-26 18:39:58 +0000
commita8753e9cbbfc38516b68eab14b806c441c6276b9 (patch)
tree44b231a2c36e8fc185e9a33b2fe77f45a48e11e7 /src/northbridge
parentcf730ce481a5d38611de68ef1dfe5fb3d51c275a (diff)
haswell/broadwell: Replace remaining MCHBAR accessors
Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 and Purism Librem 13 v1 remain identical. Change-Id: I74b633fb0b012304b5b4bd943272ed82dcb6f7d5 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52468 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/raminit.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index 5f74a8973f..9660961c4e 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -174,7 +174,7 @@ static void sdram_initialize(struct pei_data *pei_data)
* Ensure the mc_init_done_ack bit is set before continuing. Otherwise,
* attempting to access memory will lock up the system.
*/
- if (!(MCHBAR32(MC_INIT_STATE_G) & (1 << 5))) {
+ if (!(mchbar_read32(MC_INIT_STATE_G) & (1 << 5))) {
printk(BIOS_EMERG, "Memory controller did not acknowledge raminit.\n");
die("MRC raminit failed\n");
}