changes for the lx and artecgroup mobo

Signed-off-by: Indrek Kruusa
Approved-by: Ronald G. Minnich


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 28 insertions, 4 deletions

diff --git a/src/northbridge/amd/lx/grphinit.c b/src/northbridge/amd/lx/grphinit.c
index 4e0da1789d..82636aa1fe 100644
--- a/src/northbridge/amd/lx/grphinit.c
+++ b/src/northbridge/amd/lx/grphinit.c
@@ -1,8 +1,7 @@
 #include <arch/io.h>
 #include <stdint.h>
 #include <cpu/amd/vr.h>
- 
-#define VIDEO_MB	8					// MB of video memory
+#include <console/console.h>
 
 /*
  * Write to a Virtual Register
@@ -33,11 +32,36 @@ uint16_t vrRead(uint16_t wClassIndex)
  */
 void graphics_init(void)
 {
+	uint16_t wClassIndex, wData, res;
+	
 	/* SoftVG initialization */
+	printk_debug("Graphics init...\n");
 
 	/* Call SoftVG with the main configuration parameters. */
-	/* NOTE: SoftVG expects the memory size to be given in 512 KB pages */
-	vrWrite((VRC_VG <<  8) + VG_MEM_SIZE, 0x0100 | (VIDEO_MB * 2));
+	/* NOTE: SoftVG expects the memory size to be given in 2MB blocks */
+	
+	wClassIndex = (VRC_VG <<  8) + VG_MEM_SIZE;
+	
+	/*
+	 * Graphics Driver Enabled (13) 			0, NO (lets BIOS controls the GP)
+	 * External Monochrome Card Support(12)		0, NO
+	 * Controller Priority Select(11)			1, Primary
+	 * Display Select(10:8)						0x0, CRT
+	 * Graphics Memory Size(7:1)				VIDEO_MB >> 1,
+	 *											defined in mainboard/../Options.lb
+	 * PLL Reference Clock Bypass(0)			0, Default
+	 */
+
+	/*	 video RAM has to be given in 2MB chunks
+	 *   the value is read @ 7:1 (value in 7:0 looks like /2)
+	 *   so we can add the real value in megabytes
+	 */
+	 
+	wData =  0x0800 | (VIDEO_MB & VG_MEM_MASK);
+	vrWrite(wClassIndex, wData);
+	
+	res = vrRead(wClassIndex);
+	printk_debug("VRC_VG value: 0x%04x\n", res);
 }