diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-10-28 09:56:29 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-09 23:10:00 +0100 |
| commit | bb09f285c3e4e57d845231539edc6e374333cdbd (patch) | |
| tree | 67969b9f827da871d094fd147f965dcc8f4a5426 /src/northbridge/amd/amdmct/mct/mctsrc2p.c | |
| parent | ec16e9302bfc362e57e3c5d746dfcaf716537d84 (diff) | |
nb/amd/amdmct/mct: Remove commented code
Change-Id: Id0c62cebfceaf083f1bb39514b06b32c55128b85
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/17172
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct/mctsrc2p.c')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mctsrc2p.c | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctsrc2p.c b/src/northbridge/amd/amdmct/mct/mctsrc2p.c index c7c92acb17..7454f5390a 100644 --- a/src/northbridge/amd/amdmct/mct/mctsrc2p.c +++ b/src/northbridge/amd/amdmct/mct/mctsrc2p.c @@ -60,12 +60,9 @@ u8 mct_Get_Start_RcvrEnDly_Pass(struct DCTStatStruc *pDCTstat, u8 *p = pDCTstat->CH_D_B_RCVRDLY[Channel][Receiver>>1]; u8 bn; bn = 8; -// print_tx("mct_Get_Start_RcvrEnDly_Pass: Channel:", Channel); -// print_tx("mct_Get_Start_RcvrEnDly_Pass: Receiver:", Receiver); + for (i = 0; i < bn; i++) { val = p[i]; -// print_tx("mct_Get_Start_RcvrEnDly_Pass: i:", i); -// print_tx("mct_Get_Start_RcvrEnDly_Pass: val:", val); if (val > max) { max = val; } @@ -123,9 +120,7 @@ u8 mct_Average_RcvrEnDly_Pass(struct DCTStatStruc *pDCTstat, for (i = 0; i < bn; i++) { val = p[i]; /* Add 1/2 Memlock delay */ - //val += Pass1MemClkDly; val += 0x5; // NOTE: middle value with DQSRCVEN_SAVED_GOOD_TIMES - //val += 0x02; p[i] = val; pDCTstat->DimmTrainFail &= ~(1<<(Receiver + Channel)); } |