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authorFelix Held <felix-coreboot@felixheld.de>2021-08-04 19:28:45 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-09-03 15:41:00 +0000
commit99c4a29cdc13418b05945af05dae635c1058c0f3 (patch)
tree2238bc6a16abdd2b636699e58f0079c5e40e9dbb /src/mainboard
parent5d933c483f3f5ded89bee43719542f65746052c6 (diff)
mb/pcengines/apu2/gpio_ftns.h: add comment about GPIO numbers
The mapping of the package GPIO numbers to the GPIO numbers on the GPIO controller isn't a 1:1 one, so add a comment about that to avoid confusion. Also change the comment style to match the style guide. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ie30bf5483ea2e2516d7e3fdd21ea9338362e526e Reviewed-on: https://review.coreboot.org/c/coreboot/+/56808 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/pcengines/apu2/gpio_ftns.h11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.h b/src/mainboard/pcengines/apu2/gpio_ftns.h
index 95c744f62b..638622076e 100644
--- a/src/mainboard/pcengines/apu2/gpio_ftns.h
+++ b/src/mainboard/pcengines/apu2/gpio_ftns.h
@@ -5,11 +5,12 @@
int get_spd_offset(void);
-//
-// Based on PC Engines APU2C and APU3A schematics
-// http://www.pcengines.ch/schema/apu2c.pdf
-// http://www.pcengines.ch/schema/apu3a.pdf
-//
+/*
+ * Based on PC Engines APU2C and APU3A schematics
+ * http://www.pcengines.ch/schema/apu2c.pdf
+ * http://www.pcengines.ch/schema/apu3a.pdf
+ * Beware that the GPIO pin numbers on the package don't match the internal GPIO numbers
+ */
#define GPIO_22 0x09 // MODESW (APU5)
#define GPIO_32 0x59 // MODESW (SIMSWAP2 on APU5)
#define GPIO_33 0x5A // SIMSWAP (SIMSWAP3 on APU5)