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authorShelley Chen <shchen@google.com>2023-02-23 22:40:42 +0000
committerShelley Chen <shchen@google.com>2023-02-24 19:28:24 +0000
commit1720ba5e6bb70f76542420cd1d5633ea142db12a (patch)
tree07524cd9b921e8b4350bcdd690300fdf2117e9c5 /src/mainboard
parenta0473c3be68d689e728542b3036d4e751439c36c (diff)
Revert "soc/qualcomm: Increase SPI frequency to 75 MHz"
This reverts commit 363202b43589ec240c4a0c8f5b449fbd5c1333f8. Reason for revert: Seeing some bit flips on the SPI bus, but cannot repro reliably on local builds. Going to downgrade back to 50 MHz to see if builder builds are more stable on each variant as a result. Signed-off-by: Shelley Chen <shchen@google.com> Change-Id: I4fe76bac915e3b3c794821cd160a66824e38ea83 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73214 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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