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authorAngel Pons <th3fanbus@gmail.com>2021-04-04 16:11:53 +0200
committerAngel Pons <th3fanbus@gmail.com>2021-05-07 20:59:35 +0000
commit6fadde0a5371325dd166c17e27c179db4afa7e55 (patch)
treeeb814acfbdbda6503573423f590075fc73d6f13c /src/mainboard/purism/librem_skl
parent94bbf0efc8ad69e18997dbb037b1609ff59aab32 (diff)
skylake mainboards: Use enum values for SaGv
Replace `3` with `SaGv_Enabled`, which has the same value. Change-Id: I05cfddfefc45ba5bfb0e684445a6d8e02d7865e3 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52098 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/purism/librem_skl')
-rw-r--r--src/mainboard/purism/librem_skl/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb
index 47a9a5cbc6..84efd6a054 100644
--- a/src/mainboard/purism/librem_skl/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/devicetree.cb
@@ -54,7 +54,7 @@ chip soc/intel/skylake
register "ScsEmmcHs400Enabled" = "0"
register "SkipExtGfxScan" = "1"
register "HeciEnabled" = "0"
- register "SaGv" = "3"
+ register "SaGv" = "SaGv_Enabled"
register "PmConfigSlpS3MinAssert" = "2" # 50ms
register "PmConfigSlpS4MinAssert" = "1" # 1s
register "PmConfigSlpSusMinAssert" = "3" # 500ms