From 6fadde0a5371325dd166c17e27c179db4afa7e55 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sun, 4 Apr 2021 16:11:53 +0200 Subject: skylake mainboards: Use enum values for SaGv MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Replace `3` with `SaGv_Enabled`, which has the same value. Change-Id: I05cfddfefc45ba5bfb0e684445a6d8e02d7865e3 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52098 Tested-by: build bot (Jenkins) Reviewed-by: Michael Niewöhner --- src/mainboard/purism/librem_skl/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/purism/librem_skl') diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb index 47a9a5cbc6..84efd6a054 100644 --- a/src/mainboard/purism/librem_skl/devicetree.cb +++ b/src/mainboard/purism/librem_skl/devicetree.cb @@ -54,7 +54,7 @@ chip soc/intel/skylake register "ScsEmmcHs400Enabled" = "0" register "SkipExtGfxScan" = "1" register "HeciEnabled" = "0" - register "SaGv" = "3" + register "SaGv" = "SaGv_Enabled" register "PmConfigSlpS3MinAssert" = "2" # 50ms register "PmConfigSlpS4MinAssert" = "1" # 1s register "PmConfigSlpSusMinAssert" = "3" # 500ms -- cgit v1.2.3