mb/lowrisc: Remove the Nexys4DDR port

This board doesn't support the newest RISC-V Privileged Architecture
spec (1.10), and it's based on an FPGA so it's a moving target.

Now that there's actual RISC-V silicon out there (from SiFive),
mb/lowrisc/nexys4ddr will only continue to bitrot.

Change-Id: I4e3e715106a1a94381a563dc4a56781c35883c2d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

1 files changed, 0 insertions, 30 deletions

diff --git a/src/mainboard/lowrisc/nexys4ddr/uart.c b/src/mainboard/lowrisc/nexys4ddr/uart.c
deleted file mode 100644
index 7758db355a..0000000000
--- a/src/mainboard/lowrisc/nexys4ddr/uart.c
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2016 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <types.h>
-#include <console/uart.h>
-#include <arch/io.h>
-#include <boot/coreboot_tables.h>
-
-uintptr_t uart_platform_base(int idx)
-{
-	return (uintptr_t) 0x42000000;
-}
-
-/* The clock which the UART is based on */
-unsigned int uart_platform_refclk(void)
-{
-	return 25 * MHz;
-}