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author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2021-03-24 16:26:02 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2021-03-26 06:18:31 +0000 |
commit | 5504cdb51150b8bc86f4ac0cece6fd746fc7510b (patch) | |
tree | 677bc29b2f7d7e16d053164889325921beebb9b3 /src/mainboard/intel/strago/board_info.txt | |
parent | 4dd857723b298512d22c6626e6bdc6d8c4b05234 (diff) |
mb/intel/adlrvp: Remove static VBT stitching
Currently, we used to stitch extra VBT files to ADLRVP build using
Makefile. With enablement of emerge build, we should be able to
integrate more than 1 VBT binaries using ebuild.
This removing these lines to avoid compilation issues in emerge builds
BUG=None
BRANCH=None
TEST=Check if compilation passes on emerge build. Stitched additional
VBT files using emerge and checked that coreboot picks up correct VBT.
Change-Id: I69f1cc6c07415515ff85180fdd7cc5de11b4d805
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51765
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/mainboard/intel/strago/board_info.txt')
0 files changed, 0 insertions, 0 deletions