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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2018-03-16 15:28:11 -0700
committerMartin Roth <martinroth@google.com>2018-03-21 18:24:53 +0000
commitd90d17c544ca61fd8ee093dc906e3a3945e05ec6 (patch)
tree43124250a9c1f8ad1503bb2a4d897828adc66732 /src/mainboard/intel/d945gclf
parent445d553af805c5ce50527513ae6889a3f9b4a22a (diff)
mb/intel/glkrvp: Re-size flash WP_RO segment
Update the size in WP_RO segment of the flash to accommodate builds using debug FSP. Change-Id: I8b24422e1eef2d0a81006286d4fc58f238fdce11 Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Reviewed-on: https://review.coreboot.org/25255 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/d945gclf')
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