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authorSrinidhi N Kaushik <srinidhi.n.kaushik@intel.com>2018-03-16 15:28:11 -0700
committerMartin Roth <martinroth@google.com>2018-03-21 18:24:53 +0000
commitd90d17c544ca61fd8ee093dc906e3a3945e05ec6 (patch)
tree43124250a9c1f8ad1503bb2a4d897828adc66732 /src
parent445d553af805c5ce50527513ae6889a3f9b4a22a (diff)
mb/intel/glkrvp: Re-size flash WP_RO segment
Update the size in WP_RO segment of the flash to accommodate builds using debug FSP. Change-Id: I8b24422e1eef2d0a81006286d4fc58f238fdce11 Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> Reviewed-on: https://review.coreboot.org/25255 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/glkrvp/chromeos.fmd6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/intel/glkrvp/chromeos.fmd b/src/mainboard/intel/glkrvp/chromeos.fmd
index fad3537475..84808abeef 100644
--- a/src/mainboard/intel/glkrvp/chromeos.fmd
+++ b/src/mainboard/intel/glkrvp/chromeos.fmd
@@ -7,9 +7,9 @@ FLASH 16M {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
- COREBOOT(CBFS)@0x1000 0x19b000
- GBB@0x19c000 0x40000
- RO_UNUSED@0x1dc000 0x20000
+ COREBOOT(CBFS)@0x1000 0x1ab000
+ GBB@0x1ac000 0x40000
+ RO_UNUSED@0x1ec000 0x10000
}
}
MISC_RW@0x400000 0x4a000 {