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authorPatrick Rudolph <patrick.rudolph@9elements.com>2024-01-25 15:15:00 +0100
committerLean Sheng Tan <sheng.tan@9elements.com>2024-02-06 08:21:05 +0000
commit7a593ab0bb6ad33db39d49745a07b382996cc4e9 (patch)
tree849a01dcb8df397fa9f1cdffcb476472f52210ed /src/mainboard/intel/cedarisland_crb
parentfe33b2dd86e41be96a1943e381cadf2b3a722356 (diff)
soc/intel/xeon_sp/smihandler: Lock SMM_FEATURE_CONTROL on all sockets
Remove hardcoded B:D:F numbers for the first socket and pass the PCI addresses to be locked within SMM by using the smm_pci_resource_store. This allows to lock down SMM on all sockets without knowing the actual bus topology or PCI segment group at compile time where the UBOX devices reside on. Tested: SMM is locked on all 4 sockets instead of just one. Change-Id: Ica694911384005681662d3d7bed354a60bf08911 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80247 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/cedarisland_crb')
-rw-r--r--src/mainboard/intel/cedarisland_crb/ramstage.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/intel/cedarisland_crb/ramstage.c b/src/mainboard/intel/cedarisland_crb/ramstage.c
index d2ab2a7b57..ba8807b729 100644
--- a/src/mainboard/intel/cedarisland_crb/ramstage.c
+++ b/src/mainboard/intel/cedarisland_crb/ramstage.c
@@ -1,6 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <cpu/x86/smm.h>
#include <soc/ramstage.h>
+#include <soc/smmrelocate.h>
+
#include "include/gpio.h"
void mainboard_silicon_init_params(FSPS_UPD *params)
@@ -8,3 +11,8 @@ void mainboard_silicon_init_params(FSPS_UPD *params)
/* configure Lewisburg PCH GPIO controller after FSP-M */
gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table));
}
+
+void smm_mainboard_pci_resource_store_init(struct smm_pci_resource_info *slots, size_t size)
+{
+ soc_ubox_store_resources(slots, size);
+}