summaryrefslogtreecommitdiff
path: root/src/mainboard/google/volteer
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-13 15:57:06 +0300
committerFelix Held <felix-coreboot@felixheld.de>2021-12-23 21:18:25 +0000
commitff01bca624283ba149c90a32d8f5655f27749a85 (patch)
tree9f4a2acbcd62ea69b726b0034808ade61f1b4483 /src/mainboard/google/volteer
parentad489b8a2719e85933e21b14dede0a7f5833bcf9 (diff)
ChromeOS: Refactor ACPI CNVS generation
Remove chromeos_dsdt_generator() calls under mainboard, it is possible to make the single call to fill \CNVS and \OIPG without leveraging device operations. Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/volteer')
-rw-r--r--src/mainboard/google/volteer/mainboard.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/volteer/mainboard.c b/src/mainboard/google/volteer/mainboard.c
index 9f8e646ae1..892da5185e 100644
--- a/src/mainboard/google/volteer/mainboard.c
+++ b/src/mainboard/google/volteer/mainboard.c
@@ -14,7 +14,6 @@
#include <soc/gpio.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
-#include <vendorcode/google/chromeos/chromeos.h>
#include <variant/gpio.h>
#include <vb2_api.h>
@@ -78,7 +77,6 @@ static void mainboard_smbios_strings(struct device *dev, struct smbios_type11 *t
static void mainboard_enable(struct device *dev)
{
dev->ops->init = mainboard_init;
- dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator;
dev->ops->get_smbios_strings = mainboard_smbios_strings;
variant_ramstage_init();