diff options
author | Shelley Chen <shchen@google.com> | 2022-01-05 17:15:31 -0800 |
---|---|---|
committer | Shelley Chen <shchen@google.com> | 2022-01-07 22:27:37 +0000 |
commit | 3538461468aa7b0b14e1c76e09f6104a3e551b4a (patch) | |
tree | 5c84bf46cde001e1b96881f25f12abc27431f9cd /src/mainboard/google/herobrine/bootblock.c | |
parent | f00680afc5df34bdc40fc7d1c43b4f1aa812fa13 (diff) |
mb/google/herobrine: Initialize EC and TPM devices
Initialize EC and H1/TPM instances on herobrine devices.
BUG=b:182963902
BRANCH=None
TEST=Validated on qualcomm sc7280 development board
and verified booting on herobrine.
Change-Id: I8cbdd1d59a0166688d52d61646db1b6764879a7c
Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50581
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/mainboard/google/herobrine/bootblock.c')
-rw-r--r-- | src/mainboard/google/herobrine/bootblock.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/google/herobrine/bootblock.c b/src/mainboard/google/herobrine/bootblock.c index 05e53a64bb..50ca0aa4e0 100644 --- a/src/mainboard/google/herobrine/bootblock.c +++ b/src/mainboard/google/herobrine/bootblock.c @@ -2,8 +2,20 @@ #include <bootblock_common.h> #include "board.h" +#include <soc/qupv3_i2c_common.h> +#include <soc/qcom_qup_se.h> +#include <soc/qupv3_spi_common.h> void bootblock_mainboard_init(void) { setup_chromeos_gpios(); + + if (CONFIG(MAINBOARD_HAS_I2C_TPM_CR50)) + i2c_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST); /* H1/TPM I2C */ + + if (CONFIG(MAINBOARD_HAS_SPI_TPM_CR50)) + qup_spi_init(CONFIG_DRIVER_TPM_SPI_BUS, 1010 * KHz); /* H1/TPM SPI */ + + if (CONFIG(EC_GOOGLE_CHROMEEC)) + qup_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, 1010 * KHz); /* EC SPI */ } |