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authorEdward O'Callaghan <quasisec@google.com>2019-12-24 15:15:35 +1100
committerEdward O'Callaghan <quasisec@chromium.org>2019-12-25 07:16:23 +0000
commit3dbe593906d22ddcd113cad9065b38115d0163a6 (patch)
tree16d17dc69a9833d6a34cb7d353f716a84a9034b2 /src/mainboard/google/hatch/variants/mushu
parentc4a3f51618a7575628fb513133952ac57326fc24 (diff)
mainboard/google/hatch: Move gpio GPP_C* NC down into baseboard
The baseboard GPIO table definitions are too straineous to the extend that variants need to redefine assumptions back to NC. Invert this so that baseboard by default assumes the safer NC and move the specific board configurations to their respective places. This patch handles the GPP_C15 group for easier review. BUG=b:142094759 BRANCH=none TEST=builds Change-Id: I578245e24895d361d80ad016a4f18204e2b6e1ca Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37921 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/hatch/variants/mushu')
-rw-r--r--src/mainboard/google/hatch/variants/mushu/gpio.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mainboard/google/hatch/variants/mushu/gpio.c b/src/mainboard/google/hatch/variants/mushu/gpio.c
index a2adf25371..862b28fe4a 100644
--- a/src/mainboard/google/hatch/variants/mushu/gpio.c
+++ b/src/mainboard/google/hatch/variants/mushu/gpio.c
@@ -32,7 +32,14 @@ static const struct pad_config gpio_table[] = {
/* A12 : FPMCU_RST_ODL */
PAD_CFG_GPO(GPP_A12, 0, DEEP),
/* C13 : EC_PCH_INT_L */
- PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT)};
+ PAD_CFG_GPI_APIC(GPP_C13, UP_20K, PLTRST, LEVEL, INVERT),
+ /* C15 : WWAN_DPR_SAR_ODL
+ *
+ * TODO: Driver doesn't use this pin as of now. In case driver starts
+ * using this pin, expose this pin to driver.
+ */
+ PAD_CFG_GPO(GPP_C15, 1, DEEP),
+};
const struct pad_config *override_gpio_table(size_t *num)
{