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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-13 15:57:06 +0300
committerFelix Held <felix-coreboot@felixheld.de>2021-12-23 21:18:25 +0000
commitff01bca624283ba149c90a32d8f5655f27749a85 (patch)
tree9f4a2acbcd62ea69b726b0034808ade61f1b4483 /src/mainboard/google/drallion
parentad489b8a2719e85933e21b14dede0a7f5833bcf9 (diff)
ChromeOS: Refactor ACPI CNVS generation
Remove chromeos_dsdt_generator() calls under mainboard, it is possible to make the single call to fill \CNVS and \OIPG without leveraging device operations. Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55502 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google/drallion')
-rw-r--r--src/mainboard/google/drallion/ramstage.c7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/google/drallion/ramstage.c b/src/mainboard/google/drallion/ramstage.c
index d44c7b19d3..7c34c0d5c4 100644
--- a/src/mainboard/google/drallion/ramstage.c
+++ b/src/mainboard/google/drallion/ramstage.c
@@ -4,7 +4,6 @@
#include <smbios.h>
#include <soc/ramstage.h>
#include <variant/gpio.h>
-#include <vendorcode/google/chromeos/chromeos.h>
/* mainboard silk screen shows DIMM-A and DIMM-B */
void smbios_fill_dimm_locator(const struct dimm_info *dimm,
@@ -32,12 +31,6 @@ static void mainboard_init(void *chip_info)
gpio_configure_pads(gpio_table, num_gpios);
}
-static void mainboard_enable(struct device *dev)
-{
- dev->ops->acpi_inject_dsdt = chromeos_dsdt_generator;
-}
-
struct chip_operations mainboard_ops = {
.init = mainboard_init,
- .enable_dev = mainboard_enable,
};