diff options
author | Ren Kuo <ren.kuo@quanta.corp-partner.google.com> | 2021-12-22 18:42:43 +0800 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2022-01-01 14:20:27 +0000 |
commit | e15e64054c059f58569b4aa9ce132aee8c8a2e48 (patch) | |
tree | fe41edd638e01f5ab68ddf2c482d8221273da6c7 /src/mainboard/google/dedede | |
parent | 355fb2fb984cc264f4452d4bbffbd3666c71906e (diff) |
mb/google/dedede/var/magolor: Set core display clock to 172.8 MHz
When using the default initial core display clock frequency, Magolor has
a rare stability issue where the startup of Chrome OS in secure mode may
hang. Slowing the initial core display clock frequency down to 172.8 MHz
as per Intel recommendation avoids this problem.
Depend on CL: https://review.coreboot.org/c/coreboot/+/60009
The CdClock=0xff is set in dedede baseboard,and we overwrite it as 0x0
(172.8 MHz) for magolor.
BUG=b:206557434
BRANCH=dedede
TEST=Build firmware and verify on fail DUTs.
Check the DUTs can boot up in secure mode well.
Change-Id: I5a0ad2bed79b37775184f0bd0a0ef024900cbe34
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60301
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/google/dedede')
-rw-r--r-- | src/mainboard/google/dedede/variants/magolor/overridetree.cb | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/magolor/overridetree.cb b/src/mainboard/google/dedede/variants/magolor/overridetree.cb index 66fc4ea02f..e0af22dd49 100644 --- a/src/mainboard/google/dedede/variants/magolor/overridetree.cb +++ b/src/mainboard/google/dedede/variants/magolor/overridetree.cb @@ -108,6 +108,9 @@ chip soc/intel/jasperlake register "SlowSlewRate" = "SlewRateFastBy8" register "FastPkgCRampDisable" = "1" + # Core Display Clock Frequency selection + register "cd_clock" = "CD_CLOCK_172_8_MHZ" + device domain 0 on device pci 04.0 on chip drivers/intel/dptf |