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authorKarthikeyan Ramasubramanian <kramasub@google.com>2020-02-28 17:00:14 -0700
committerMartin Roth <martinroth@google.com>2020-03-14 23:31:05 +0000
commitf354c8c6258aa30c545c78c454c2e174b19abeae (patch)
tree1e34566350c5cd51f1e8f61fd8981fef903c224e /src/mainboard/google/dedede/variants/waddledoo
parent136e0cbbc139356e39d7f0457dd05cac1ee5183f (diff)
mb/google/dedede: Configure WLAN
Turn on CNVi device. Turn on PCIe Root port that hosts WLAN device. Configure PCIe Clk Source and Clk Request mapping. Configure GPIOs used for WLAN - both CNVi and M.2. BUG=None TEST=Build the mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I9bb8e57cdb688bc544929c94af380b9ef1d936a2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/39115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google/dedede/variants/waddledoo')
-rw-r--r--src/mainboard/google/dedede/variants/waddledoo/overridetree.cb7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb
index 061a0f865f..9860e3de46 100644
--- a/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/waddledoo/overridetree.cb
@@ -49,5 +49,12 @@ chip soc/intel/tigerlake
device i2c 15 on end
end
end #I2C 0
+
+ device pci 1c.7 on
+ chip drivers/intel/wifi
+ register "wake" = "GPE0_DW2_03"
+ device pci 00.0 on end
+ end
+ end # PCI Express Root Port 8 - WLAN
end
end