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authorHung-Te Lin <hungte@chromium.org>2022-09-06 14:32:05 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-09-07 09:20:25 +0000
commita01f8bc450d782c9b0859c8caaaa3df87fe5a854 (patch)
treeb6f301ea3e7d09e256489c7c3f5918211ff9473c /src/mainboard/google/cherry/mainboard.c
parent70f30afa89b725aa8655bed881f823408ac54453 (diff)
soc/mediatek: a common implementation to register BL31 reset
The implementations of register_reset_to_bl31() are the same for MedaiTek platforms, so we extract them to soc/common/bl31.c. BUG=None TEST=build pass Change-Id: I297ea2e18a6d7e92236cf415844b166523616bdf Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67359 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/mainboard/google/cherry/mainboard.c')
-rw-r--r--src/mainboard/google/cherry/mainboard.c18
1 files changed, 3 insertions, 15 deletions
diff --git a/src/mainboard/google/cherry/mainboard.c b/src/mainboard/google/cherry/mainboard.c
index b69403eb1e..c67a581c77 100644
--- a/src/mainboard/google/cherry/mainboard.c
+++ b/src/mainboard/google/cherry/mainboard.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <bl31.h>
#include <boardid.h>
#include <bootmode.h>
#include <console/console.h>
@@ -10,6 +9,7 @@
#include <edid.h>
#include <framebuffer_info.h>
#include <gpio.h>
+#include <soc/bl31.h>
#include <soc/ddp.h>
#include <soc/dpm.h>
#include <soc/dptx.h>
@@ -23,8 +23,6 @@
#include "gpio.h"
-#include <arm-trusted-firmware/include/export/plat/mediatek/common/plat_params_exp.h>
-
/* GPIO to schematics names */
#define GPIO_AP_EDP_BKLTEN GPIO(DGI_D5)
#define GPIO_BL_PWM_1V8 GPIO(DISP_PWM0)
@@ -57,17 +55,6 @@ bool mainboard_needs_pcie_init(void)
}
}
-static void register_reset_to_bl31(void)
-{
- static struct bl_aux_param_gpio param_reset = {
- .h = { .type = BL_AUX_PARAM_MTK_RESET_GPIO },
- .gpio = { .polarity = ARM_TF_GPIO_LEVEL_HIGH },
- };
-
- param_reset.gpio.index = GPIO_RESET.id;
- register_bl31_aux_param(&param_reset.h);
-}
-
/* Set up backlight control pins as output pin and power-off by default */
static void configure_panel_backlight(void)
{
@@ -160,7 +147,8 @@ static void mainboard_init(struct device *dev)
if (spm_init())
printk(BIOS_ERR, "spm init failed, system suspend may not work\n");
- register_reset_to_bl31();
+ if (CONFIG(ARM64_USE_ARM_TRUSTED_FIRMWARE))
+ register_reset_to_bl31(GPIO_RESET.id, true);
}
static void mainboard_enable(struct device *dev)