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authorYu-Ping Wu <yupingso@chromium.org>2021-04-01 16:11:25 +0800
committerHung-Te Lin <hungte@chromium.org>2021-05-07 10:20:11 +0000
commita21797a51ed06dc9a5bff81a9e50c177e7ac23fa (patch)
treeba79c9c1df6fc72ad1757fb1ebb648ee53b6daf5 /src/mainboard/google/cherry/bootblock.c
parentce6fdd458b3b93f36a4589584dc13c317c0aa976 (diff)
mb/google/cherry: configure GPIOs
Configure Chromebook specific GPIOs, including EC_AP_INT, SD_CD, EC_IN_RW, GSC_AP_INT and EN_SPK. Change-Id: Id553f632412af440d21a3b51e017cb74cc27fd22 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52924 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/cherry/bootblock.c')
-rw-r--r--src/mainboard/google/cherry/bootblock.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/cherry/bootblock.c b/src/mainboard/google/cherry/bootblock.c
index 6f61a8282b..adb87d03d9 100644
--- a/src/mainboard/google/cherry/bootblock.c
+++ b/src/mainboard/google/cherry/bootblock.c
@@ -4,6 +4,8 @@
#include <device/mmio.h>
#include <soc/gpio.h>
+#include "gpio.h"
+
struct pad_func {
u8 pin_id;
u8 func;
@@ -34,4 +36,5 @@ static void nor_set_gpio_pinmux(void)
void bootblock_mainboard_init(void)
{
nor_set_gpio_pinmux();
+ setup_chromeos_gpios();
}