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authorCliff Huang <cliff.huang@intel.com>2023-03-02 10:17:50 -0800
committerFelix Held <felix-coreboot@felixheld.de>2023-04-21 18:48:43 +0000
commitdaeb781884561f2f19cf67de8d5e24e9877ab1af (patch)
tree8c6b676ed45c0da205fbc9b1c52bac21cf7f830b /src/mainboard/google/brya/variants/redrix4es
parentfe0f8165c7f92ffc20cdfde3111aac66c98e77de (diff)
mb/google/brya: Enable RTD3 root port mutex for WWAN
This adds RTD3 RPMX mutex to the root port. It is shared between RTD3 and WWAN. BRANCH=firmware-brya-14505.B TEST=boot to OS and check the generated SSDT table for the root port. The RPMX mutex should be generated under the root port. Signed-off-by: Cliff Huang <cliff.huang@intel.com> Change-Id: Ia87b5f9d8300d6263c84a586256424799d3a45b1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73382 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google/brya/variants/redrix4es')
-rw-r--r--src/mainboard/google/brya/variants/redrix4es/overridetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
index c6cf48917b..81a808fa5b 100644
--- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
+++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb
@@ -173,6 +173,7 @@ chip soc/intel/alderlake
register "srcclk_pin" = "5"
register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
register "skip_on_off_support" = "true"
+ register "use_rp_mutex" = "true"
device generic 0 alias rp6_rtd3 on
probe DB_LTE LTE_PCIE
end