diff options
| author | Usha P <usha.p@intel.com> | 2022-05-09 08:36:51 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-24 14:17:18 +0000 |
| commit | 0a3bbe8645bbd88285f3128d9c2f49af4fb5535b (patch) | |
| tree | 0e760e37721f6fa185d1f4a9830e7c63e6b5f1ee /src/mainboard/google/brya/variants/baseboard | |
| parent | 6b1c0e9cc31ff34a633e9d1dba9f56191f8f2452 (diff) | |
mb/google/brya: Set eMMC dll tuning parameters for Nissa
Add support for MB level dll tuning.
This patch sets the eMMC dll tuning parameters to default values needed.
There was issue observed on some eMMC devices which failed to boot in
HS400 mode.EV team suggested the intermediate eMMC dll tuning parameters
that needs to be set. We observed these values helped to fix the issue.
While we get the verified default values set from FSP directly, adding
it here to use it as the custom dll values needed.
BUG=b:230403441
TEST=Build and boot nivviks board. Verify the eMMC dll parameters are
overridden.
[INFO ] usha: After override dll_params
[INFO ] usha: emmc_tx_cmd_cntl=505
[INFO ] usha: emmc_tx_data_cntl1=909
[INFO ] usha: emmc_tx_data_cntl2=1c2a2828
[INFO ] usha: emmc_rx_cmd_data_cntl1=1c1b1d3c
[INFO ] usha: emmc_rx_cmd_data_cntl2=10049
[INFO ] usha: emmc_rx_strobe_cntl=11515
Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: I27771b663ce9808e5a5ef4b36c136ad78f924376
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/mainboard/google/brya/variants/baseboard')
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index 9267e21557..83cd62fad8 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -31,6 +31,16 @@ chip soc/intel/alderlake # eMMC HS400 register "emmc_enable_hs400_mode" = "1" + #eMMC DLL tuning parameters + #Adding the intermediate eMMC DLL tuning override values + #TODO SoC implementation with the finalized verified values from EV Team + register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909" + register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B1D3C" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10049" + register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x11515" + register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A0 |