mb/google/brya: Introduce new baseboard brask

This patch initiates the brask setting which includes
the gpio and device tree setting.

BUG=b:191472401
BRANCH=None
TEST=build pass

Change-Id: I1bb42c7bb2492402de0810bc4ab2e8d8c0e2392b
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56388
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

1 files changed, 25 insertions, 0 deletions

diff --git a/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
new file mode 100644
index 0000000000..c938de820d
--- /dev/null
+++ b/src/mainboard/google/brya/variants/baseboard/include/baseboard/variants.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __BASEBOARD_VARIANTS_H__
+#define __BASEBOARD_VARIANTS_H__
+
+#include <chip.h>
+#include <soc/gpio.h>
+#include <soc/meminit.h>
+#include <stdint.h>
+
+/* The next set of functions return the gpio table and fill in the number of entries for
+ * each table.
+ */
+
+const struct pad_config *variant_gpio_table(size_t *num);
+const struct pad_config *variant_gpio_override_table(size_t *num);
+const struct pad_config *variant_early_gpio_table(size_t *num);
+const struct cros_gpio *variant_cros_gpios(size_t *num);
+
+const struct mb_cfg *variant_memory_params(void);
+int variant_memory_sku(void);
+bool variant_is_half_populated(void);
+void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config);
+
+#endif /*__BASEBOARD_VARIANTS_H__ */