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| author | Ren Kuo <ren.kuo@quanta.corp-partner.google.com> | 2023-01-18 16:23:54 +0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-02-05 01:03:54 +0000 |
| commit | f700ddffb1ca2c407d2c5e7f8a588bc9c81da47e (patch) | |
| tree | 34a8d3d9d2856cce48bace0dc34db01ac1b80ebc /src/mainboard/google/brya/spd | |
| parent | f4ac5ea179af244fcb839ce20d528153f0267917 (diff) | |
mb/google/nissa/var/craask: Modify clkreq to clksrc mapping
NVMe PCIe 9-12 using clk_src1 and clk_req2 mapping to hardware design,
Due to inconsistency between PMC firmware and FSP, we need to set
clk_src to clk_req number, not same as hardware mapping in coreboot.
Then swap correct setting to clk_src=1,clk_req=2 in mFIT.
BUG=b:265720813
TEST=build firmware and veirfy suspend function on DUT.
Cq-Depend: chrome-internal:5351299
Change-Id: Ia057dfa98cb9293d9e212edb4e4ac198e94e8985
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72051
Reviewed-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brya/spd')
0 files changed, 0 insertions, 0 deletions