diff options
| author | Ren Kuo <ren.kuo@quanta.corp-partner.google.com> | 2024-08-29 10:14:40 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-09-03 02:23:15 +0000 |
| commit | 8cfe1b3302ff2d6e1fcce7508627529b3a80dc6d (patch) | |
| tree | 458936ce15ff7d3c22c3ea3d55ec17d6f7f96ed5 /src/mainboard/google/brox/variants/jubilant/overridetree.cb | |
| parent | b9a12911afc133e806e4d78bcf75b07406f3e3c4 (diff) | |
mb/google/brox/jubilant: Modify FP IRQ pin to GPP_D13
Modify the FP IRQ pin to GPP_D13 from GPP_F15 from HW change on EVT.
The design change to follow the brox's GPE0 routing, and the
FP wake source can be routed.
BUG=b:363166664
TEST= Build jubilant firmware
Change-Id: Ic4a7ca07eab0dab234ab025cf77bbb8093b6b9d1
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84124
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/brox/variants/jubilant/overridetree.cb')
| -rw-r--r-- | src/mainboard/google/brox/variants/jubilant/overridetree.cb | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/brox/variants/jubilant/overridetree.cb b/src/mainboard/google/brox/variants/jubilant/overridetree.cb index d1fbb8bebd..2f6f83b6f8 100644 --- a/src/mainboard/google/brox/variants/jubilant/overridetree.cb +++ b/src/mainboard/google/brox/variants/jubilant/overridetree.cb @@ -399,8 +399,8 @@ chip soc/intel/alderlake register "hid" = "ACPI_DT_NAMESPACE_HID" register "uid" = "1" register "compat_string" = ""google,cros-ec-spi"" - register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)" - register "wake" = "GPE0_DW2_15" + register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_D13_IRQ)" + register "wake" = "GPE0_DW1_13" register "has_power_resource" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" |