diff options
| author | Keith Hui <buurin@gmail.com> | 2023-07-22 12:49:05 -0400 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-11-13 20:31:23 +0000 |
| commit | 45e4ab4a660cb7ce312f2d11a153f2d9ef4158da (patch) | |
| tree | 8b0fb3b07ecb3cfa84aa77b51c0e1053a1415c73 /src/mainboard/gigabyte | |
| parent | 940fe080bf1ed2dac827b569c70fb0ea11496041 (diff) | |
mb/*: Update SPD mapping for sandybridge boards
Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree.
Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping.
Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard/gigabyte')
4 files changed, 4 insertions, 17 deletions
diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb index b0ef1ee4ea..3b9584360b 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb @@ -1,4 +1,6 @@ chip northbridge/intel/sandybridge + # FIXME: The GA-B75M-D3V only has two DIMM slots! + register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}" device domain 0 on subsystemid 0x1458 0x5000 inherit device ref host_bridge on # Host bridge diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c b/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c index a88abf89c9..8fd6f989ec 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c +++ b/src/mainboard/gigabyte/ga-b75m-d3h/early_init.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/raminit_native.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h> @@ -57,12 +56,3 @@ const struct southbridge_usb_port mainboard_usb_ports[] = { { 1, 5, 5 }, { 1, 5, 6 }, }; - -/* FIXME: The GA-B75M-D3V only has two DIMM slots! */ -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[1], 0x51, id_only); - read_spd(&spd[2], 0x52, id_only); - read_spd(&spd[3], 0x53, id_only); -} diff --git a/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb b/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb index 8b602a3b7b..8a29171fda 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-series/devicetree.cb @@ -1,6 +1,7 @@ ## SPDX-License-Identifier: GPL-2.0-only chip northbridge/intel/sandybridge + register "spd_addresses" = "{0x50, 0, 0x52, 0}" device domain 0 on subsystemid 0x1458 0x5000 inherit diff --git a/src/mainboard/gigabyte/ga-h61m-series/early_init.c b/src/mainboard/gigabyte/ga-h61m-series/early_init.c index 975e88a261..6f9109af0f 100644 --- a/src/mainboard/gigabyte/ga-h61m-series/early_init.c +++ b/src/mainboard/gigabyte/ga-h61m-series/early_init.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <northbridge/intel/sandybridge/raminit_native.h> +#include <northbridge/intel/sandybridge/raminit.h> #include <southbridge/intel/bd82x6x/pch.h> #include <superio/ite/common/ite.h> #include <superio/ite/it8728f/it8728f.h> @@ -36,9 +36,3 @@ void bootblock_mainboard_early_init(void) /* Disable SIO WDT which kicks in DualBIOS */ ite_reg_write(SUPERIO_GPIO, 0xEF, 0x7E); } - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} |