diff options
author | Stefan Reinauer <stepan@openbios.org> | 2004-06-28 11:57:31 +0000 |
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committer | Stefan Reinauer <stepan@openbios.org> | 2004-06-28 11:57:31 +0000 |
commit | 4a3bb76aa85ba720b607152d853bd7e1964a9f6c (patch) | |
tree | 0daabca0f3c90d2557bfe9c6d7e01102a6270b8f /src/mainboard/emulation/qemu-i386/irq_tables.c | |
parent | bbf16821c000ad347bfd2681bdda383028cc011e (diff) |
commit initial qemu support (see http://fabrice.bellard.free.fr/qemu/)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/emulation/qemu-i386/irq_tables.c')
-rw-r--r-- | src/mainboard/emulation/qemu-i386/irq_tables.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/src/mainboard/emulation/qemu-i386/irq_tables.c b/src/mainboard/emulation/qemu-i386/irq_tables.c new file mode 100644 index 0000000000..894c27dec5 --- /dev/null +++ b/src/mainboard/emulation/qemu-i386/irq_tables.c @@ -0,0 +1,32 @@ +/* This file was generated by getpir.c, do not modify! + (but if you do, please run checkpir on it to verify) + Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up + + Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM +*/ + +#include <arch/pirq_routing.h> + +const struct irq_routing_table intel_irq_routing_table = { + PIRQ_SIGNATURE, /* u32 signature */ + PIRQ_VERSION, /* u16 version */ + 32+16*5, /* there can be total 5 devices on the bus */ + 0, /* Where the interrupt router lies (bus) */ + 0x88, /* Where the interrupt router lies (dev) */ + 0x1c20, /* IRQs devoted exclusively to PCI usage */ + 0x1106, /* Vendor */ + 0x8231, /* Device */ + 0, /* Crap (miniport) */ + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ + 0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ + { + /* 8231 ethernet */ + {0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0}, + /* 8231 internal */ + {0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0}, + /* PCI slot */ + {0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0}, + {0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0}, + {0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0}, + } +}; |