aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/compulab
diff options
context:
space:
mode:
authorKeith Hui <buurin@gmail.com>2023-07-22 12:49:05 -0400
committerFelix Held <felix-coreboot@felixheld.de>2023-11-13 20:31:23 +0000
commit45e4ab4a660cb7ce312f2d11a153f2d9ef4158da (patch)
tree8b0fb3b07ecb3cfa84aa77b51c0e1053a1415c73 /src/mainboard/compulab
parent940fe080bf1ed2dac827b569c70fb0ea11496041 (diff)
mb/*: Update SPD mapping for sandybridge boards
Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree. Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping. Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard/compulab')
-rw-r--r--src/mainboard/compulab/intense_pc/devicetree.cb2
-rw-r--r--src/mainboard/compulab/intense_pc/early_init.c7
2 files changed, 2 insertions, 7 deletions
diff --git a/src/mainboard/compulab/intense_pc/devicetree.cb b/src/mainboard/compulab/intense_pc/devicetree.cb
index c108d4de91..d09c9e0b1f 100644
--- a/src/mainboard/compulab/intense_pc/devicetree.cb
+++ b/src/mainboard/compulab/intense_pc/devicetree.cb
@@ -6,6 +6,8 @@ chip northbridge/intel/sandybridge # FIXME: check gfx
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
+
device domain 0 on
device ref host_bridge on # Host bridge
subsystemid 0x8086 0x2010
diff --git a/src/mainboard/compulab/intense_pc/early_init.c b/src/mainboard/compulab/intense_pc/early_init.c
index d3842f83f5..f5859e99d6 100644
--- a/src/mainboard/compulab/intense_pc/early_init.c
+++ b/src/mainboard/compulab/intense_pc/early_init.c
@@ -3,7 +3,6 @@
#include <bootblock_common.h>
#include <stdint.h>
#include <arch/io.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
#include <superio/smsc/sio1007/sio1007.h>
#include <southbridge/intel/bd82x6x/pch.h>
@@ -62,9 +61,3 @@ void bootblock_mainboard_early_init(void)
/* Turn off configuration mode. */
outb(0xaa, port);
}
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
- read_spd(&spd[0], 0x50, id_only);
- read_spd(&spd[2], 0x52, id_only);
-}