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authorKeith Hui <buurin@gmail.com>2023-07-22 12:49:05 -0400
committerFelix Held <felix-coreboot@felixheld.de>2023-11-13 20:31:23 +0000
commit45e4ab4a660cb7ce312f2d11a153f2d9ef4158da (patch)
tree8b0fb3b07ecb3cfa84aa77b51c0e1053a1415c73 /src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro
parent940fe080bf1ed2dac827b569c70fb0ea11496041 (diff)
mb/*: Update SPD mapping for sandybridge boards
Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree. Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping. Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro')
-rw-r--r--src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
index ac3eb42039..c8d5e33cbc 100644
--- a/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
+++ b/src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c
@@ -1,9 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/hpet.h>
#include <bootblock_common.h>
#include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/sandybridge.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
@@ -11,7 +9,6 @@
#include <option.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
#include <northbridge/intel/sandybridge/raminit.h>
#include <northbridge/intel/sandybridge/pei_data.h>
@@ -48,20 +45,8 @@ void bootblock_mainboard_early_init(void)
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
- read_spd(&spd[0], 0x50, id_only);
- read_spd(&spd[1], 0x51, id_only);
- read_spd(&spd[2], 0x52, id_only);
- read_spd(&spd[3], 0x53, id_only);
-}
-
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
- const uint8_t spdaddr[] = {0xa0, 0xa2, 0xa4, 0xa6}; /* SMBus mul 2 */
-
- memcpy(pei_data->spd_addresses, &spdaddr, sizeof(pei_data->spd_addresses));
-
/*
* USB3 mode:
* 0 = Disable: work always as USB 2.0(ehci)