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authorarch import user (historical) <svn@openbios.org>2005-07-06 17:17:25 +0000
committerarch import user (historical) <svn@openbios.org>2005-07-06 17:17:25 +0000
commit6ca7636c8f52560e732cdd5b1c7829cda5aa2bde (patch)
treecc45ae7c4dea6e2c5338f52b4314106bf07023be /src/mainboard/Iwill/DK8S2/Options.lb
parentb2ed53dd5669c2c3839633bd2b3b4af709a5b149 (diff)
Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51
Creator: Yinghai Lu <yhlu@tyan.com> cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/Iwill/DK8S2/Options.lb')
-rw-r--r--src/mainboard/Iwill/DK8S2/Options.lb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/Iwill/DK8S2/Options.lb b/src/mainboard/Iwill/DK8S2/Options.lb
index 373d1a98a9..d7b694d1f8 100644
--- a/src/mainboard/Iwill/DK8S2/Options.lb
+++ b/src/mainboard/Iwill/DK8S2/Options.lb
@@ -51,6 +51,8 @@ uses CC
uses HOSTCC
uses OBJCOPY
+uses CONFIG_USE_INIT
+
## ROM_SIZE is the size of boot ROM that this board will use.
default ROM_SIZE=524288