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authorKyösti Mälkki <kyosti.malkki@gmail.com>2023-07-04 10:09:59 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2023-07-10 04:43:05 +0000
commit6739a6a89f5b7526bddc63b16ffc519c39d788dd (patch)
treeae1375f5a837ea10c90dca063f0f5369ea34311a /src/lib
parent72d7181e4f80fb7c344337364fd665fc4c49132a (diff)
vboot: Fix S3 resume with stage_cache
In VBOOT_STARTS_IN_ROMSTAGE=y case, vboot_run_logic() did not get called when postcar was loaded from TSEG stage cache on ACPI S3 resume path. Resume failed as MP init attempts to access microcode update from unverified FW_MAIN_A/B section. In a similar fashion, for POSTCAR=n, loading ramstage from TSEG stage cache would bypass the call to vboot_run_logic(). TEST=samsung/lumpy with VBOOT_STARTS_IN_ROMSTAGE=y is able to complete S3 resume. Change-Id: I77fe86d5fd89d22b5ef6f43e65a85a4ccd3259d9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76209 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/prog_loaders.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 17d946eac9..9e661c5956 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -92,6 +92,8 @@ void __noreturn run_ramstage(void)
else
timestamp_add_now(TS_ROMSTAGE_END);
+ vboot_run_logic();
+
/*
* Only x86 systems using ramstage stage cache currently take the same
* firmware path on resume.
@@ -99,8 +101,6 @@ void __noreturn run_ramstage(void)
if (ENV_X86 && resume_from_stage_cache())
run_ramstage_from_resume(&ramstage);
- vboot_run_logic();
-
timestamp_add_now(TS_COPYRAM_START);
if (ENV_X86) {