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authorTim Wawrzynczak <twawrzynczak@chromium.org>2022-08-25 17:20:59 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-09-12 12:24:51 +0000
commit7bc8fd58a323dba10d38867dc018a9feed2befaa (patch)
treea9f5f7c9a722e562b408e22c8705ca9bed67f89c /src/include/ramdetect.h
parentcf46099979155659d9c5e781906764887c9c48c6 (diff)
mb/google/brya/acpi: Save/restore/clear some registers over GCOFF
Similar to the prior CL (commit db8ad5e), do the same register dance before/after GCOFF. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: I8fecba40c5a5af11e24f82db07face3ce10481bf Reviewed-on: https://review.coreboot.org/c/coreboot/+/67086 Reviewed-by: Anil Kumar K <anil.kumar.k@intel.corp-partner.google.com> Reviewed-by: Cliff Huang <cliff.huang@intel.com> Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/ramdetect.h')
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