diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-07 08:18:14 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-22 10:48:11 +0000 |
commit | 1818733faa9af615bc1d9024dee10865aaf22da0 (patch) | |
tree | 9785ab9bddec3c7f6d8128ff4d4a5348913e0b10 /src/include/cpu/intel/em64t100_save_state.h | |
parent | 7f8b0cd89c10621f456e3eebcd290d3946122d6d (diff) |
cpu/intel/smm: Drop em64t save state
This save state is just plainly wrong in many regards and em64t100
should be used.
Checked with a model 0x17 core2 CPU.
Change-Id: I4d89691e87c91dd12b34a44b74849b18b4ac5369
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36660
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/include/cpu/intel/em64t100_save_state.h')
-rw-r--r-- | src/include/cpu/intel/em64t100_save_state.h | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/include/cpu/intel/em64t100_save_state.h b/src/include/cpu/intel/em64t100_save_state.h index f76fa4badd..6e8e1d9745 100644 --- a/src/include/cpu/intel/em64t100_save_state.h +++ b/src/include/cpu/intel/em64t100_save_state.h @@ -17,10 +17,8 @@ #include <types.h> #include <cpu/x86/smm.h> -/* Intel Revision 30100 SMM State-Save Area - * The following processor architectures use this: - * - Bay Trail - */ +/* Intel Revision 30100 SMM State-Save Area */ + #define SMM_EM64T100_ARCH_OFFSET 0x7c00 #define SMM_EM64T100_SAVE_STATE_OFFSET \ SMM_SAVE_STATE_BEGIN(SMM_EM64T100_ARCH_OFFSET) |