diff options
-rw-r--r-- | src/cpu/x86/smm/smihandler.c | 11 | ||||
-rw-r--r-- | src/include/cpu/intel/em64t100_save_state.h | 6 | ||||
-rw-r--r-- | src/include/cpu/intel/em64t_save_state.h | 101 |
3 files changed, 7 insertions, 111 deletions
diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index 68b7859a04..20417d127e 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -18,7 +18,6 @@ #include <cpu/x86/smm.h> #include <cpu/x86/smi_deprecated.h> #include <cpu/amd/amd64_save_state.h> -#include <cpu/intel/em64t_save_state.h> #include <cpu/intel/em64t100_save_state.h> #include <cpu/intel/em64t101_save_state.h> #include <cpu/x86/legacy_save_state.h> @@ -29,7 +28,7 @@ typedef enum { AMD64, - EM64T, + EM64T100, EM64T101, LEGACY } save_state_type_t; @@ -38,7 +37,7 @@ typedef struct { save_state_type_t type; union { amd64_smm_state_save_area_t *amd64_state_save; - em64t_smm_state_save_area_t *em64t_state_save; + em64t100_smm_state_save_area_t *em64t100_state_save; em64t101_smm_state_save_area_t *em64t101_state_save; legacy_smm_state_save_area_t *legacy_state_save; }; @@ -178,10 +177,10 @@ void smi_handler(u32 smm_revision) SMM_LEGACY_ARCH_OFFSET, node); break; case 0x00030100: - state_save.type = EM64T; - state_save.em64t_state_save = + state_save.type = EM64T100; + state_save.em64t100_state_save = smm_save_state(smm_base, - SMM_EM64T_ARCH_OFFSET, node); + SMM_EM64T100_ARCH_OFFSET, node); break; case 0x00030101: /* SandyBridge, IvyBridge, and Haswell */ state_save.type = EM64T101; diff --git a/src/include/cpu/intel/em64t100_save_state.h b/src/include/cpu/intel/em64t100_save_state.h index f76fa4badd..6e8e1d9745 100644 --- a/src/include/cpu/intel/em64t100_save_state.h +++ b/src/include/cpu/intel/em64t100_save_state.h @@ -17,10 +17,8 @@ #include <types.h> #include <cpu/x86/smm.h> -/* Intel Revision 30100 SMM State-Save Area - * The following processor architectures use this: - * - Bay Trail - */ +/* Intel Revision 30100 SMM State-Save Area */ + #define SMM_EM64T100_ARCH_OFFSET 0x7c00 #define SMM_EM64T100_SAVE_STATE_OFFSET \ SMM_SAVE_STATE_BEGIN(SMM_EM64T100_ARCH_OFFSET) diff --git a/src/include/cpu/intel/em64t_save_state.h b/src/include/cpu/intel/em64t_save_state.h deleted file mode 100644 index 1dd01a61a4..0000000000 --- a/src/include/cpu/intel/em64t_save_state.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __EM64T_SAVE_STATE_H__ -#define __EM64T_SAVE_STATE_H__ - -#include <types.h> -#include <cpu/x86/smm.h> - -/* Intel Core 2 (EM64T) SMM State-Save Area - * starts @ 0x7c00 - */ -#define SMM_EM64T_ARCH_OFFSET 0x7c00 -#define SMM_EM64T_SAVE_STATE_OFFSET \ - SMM_SAVE_STATE_BEGIN(SMM_EM64T_ARCH_OFFSET) -typedef struct { - u8 reserved0[256]; - u8 reserved1[208]; - - u32 gdtr_upper_base; - u32 ldtr_upper_base; - u32 idtr_upper_base; - - u8 reserved2[4]; - - u64 io_rdi; - u64 io_rip; - u64 io_rcx; - u64 io_rsi; - u64 cr4; - - u8 reserved3[68]; - - u64 gdtr_base; - u64 idtr_base; - u64 ldtr_base; - - u8 reserved4[84]; - - u32 smm_revision; - u32 smbase; - - u16 io_restart; - u16 autohalt_restart; - - u8 reserved5[24]; - - u64 r15; - u64 r14; - u64 r13; - u64 r12; - u64 r11; - u64 r10; - u64 r9; - u64 r8; - - u64 rax; - u64 rcx; - u64 rdx; - u64 rbx; - - u64 rsp; - u64 rbp; - u64 rsi; - u64 rdi; - - - u64 io_mem_addr; - u32 io_misc_info; - - u32 es_sel; - u32 cs_sel; - u32 ss_sel; - u32 ds_sel; - u32 fs_sel; - u32 gs_sel; - - u32 ldtr_sel; - u32 tr_sel; - - u64 dr7; - u64 dr6; - u64 rip; - u64 efer; - u64 rflags; - - u64 cr3; - u64 cr0; -} __packed em64t_smm_state_save_area_t; - -#endif |