diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-03-15 14:56:16 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-16 21:29:53 +0000 |
| commit | fff20212afe2c83af90dbec39d112a31d34b6658 (patch) | |
| tree | ed5d0de6ca1aac63822c479428e1ca63bdf14748 /src/drivers/ti | |
| parent | 97a0d61f0d1d5a9280ba72e2e50d87e4b853777f (diff) | |
Use the fallthrough statement in switch loops
Clang does not seem to work with 'fall through' in comments.
Change-Id: Idcbe373be33ef7247548f856bfaba7ceb7f749b5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/drivers/ti')
| -rw-r--r-- | src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c index 806e9b20ab..2130e33ccf 100644 --- a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c +++ b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c @@ -301,13 +301,13 @@ static void sn65dsi86_bridge_valid_dp_rates(uint8_t bus, uint8_t chip, bool rate default: printk(BIOS_ERR, "Unexpected max rate (%#x); assuming 5.4 GHz\n", (int)dpcd_val); - /* fall through */ + __fallthrough; case DP_LINK_BW_5_4: rate_valid[7] = 1; - /* fall through */ + __fallthrough; case DP_LINK_BW_2_7: rate_valid[4] = 1; - /* fall through */ + __fallthrough; case DP_LINK_BW_1_62: rate_valid[1] = 1; break; |