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authorArthur Heymans <arthur@aheymans.xyz>2021-03-15 14:56:16 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-02-16 21:29:53 +0000
commitfff20212afe2c83af90dbec39d112a31d34b6658 (patch)
treeed5d0de6ca1aac63822c479428e1ca63bdf14748 /src
parent97a0d61f0d1d5a9280ba72e2e50d87e4b853777f (diff)
Use the fallthrough statement in switch loops
Clang does not seem to work with 'fall through' in comments. Change-Id: Idcbe373be33ef7247548f856bfaba7ceb7f749b5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/console/vtxprintf.c3
-rw-r--r--src/drivers/aspeed/common/ast_main.c2
-rw-r--r--src/drivers/ipmi/ipmi_kcs_ops.c4
-rw-r--r--src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c6
-rw-r--r--src/ec/google/chromeec/ec_acpi.c3
-rw-r--r--src/ec/kontron/kempld/kempld.c4
-rw-r--r--src/lib/dp_aux.c4
-rw-r--r--src/lib/edid.c6
-rw-r--r--src/lib/prog_loaders.c3
-rw-r--r--src/mainboard/google/poppy/variants/nami/mainboard.c2
-rw-r--r--src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c2
-rw-r--r--src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c2
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c2
-rw-r--r--src/soc/nvidia/tegra124/sor.c8
-rw-r--r--src/soc/nvidia/tegra210/sor.c7
-rw-r--r--src/soc/rockchip/rk3288/sdram.c5
-rw-r--r--src/southbridge/amd/agesa/hudson/hudson.c6
-rw-r--r--src/southbridge/amd/agesa/hudson/lpc.c4
-rw-r--r--src/southbridge/amd/cimx/sb800/lpc.c4
-rw-r--r--src/southbridge/amd/pi/hudson/lpc.c4
-rw-r--r--src/superio/nuvoton/nct5104d/superio.c2
21 files changed, 44 insertions, 39 deletions
diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c
index 2a5143070d..f8055dadcc 100644
--- a/src/console/vtxprintf.c
+++ b/src/console/vtxprintf.c
@@ -244,7 +244,7 @@ repeat:
case 'X':
flags |= LARGE;
- /* fall through */
+ __fallthrough;
case 'x':
base = 16;
break;
@@ -252,6 +252,7 @@ repeat:
case 'd':
case 'i':
flags |= SIGN;
+ __fallthrough;
case 'u':
break;
diff --git a/src/drivers/aspeed/common/ast_main.c b/src/drivers/aspeed/common/ast_main.c
index 021bf9a971..8dccb45322 100644
--- a/src/drivers/aspeed/common/ast_main.c
+++ b/src/drivers/aspeed/common/ast_main.c
@@ -212,7 +212,7 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post)
ast->dp501_fw_addr = NULL;
}
}
- /* fallthrough */
+ __fallthrough;
case 0x0c:
ast->tx_chip_type = AST_TX_DP501;
}
diff --git a/src/drivers/ipmi/ipmi_kcs_ops.c b/src/drivers/ipmi/ipmi_kcs_ops.c
index ff187663c9..4ffa91fe23 100644
--- a/src/drivers/ipmi/ipmi_kcs_ops.c
+++ b/src/drivers/ipmi/ipmi_kcs_ops.c
@@ -247,7 +247,7 @@ ipmi_write_acpi_tables(const struct device *dev, unsigned long current,
break;
default:
printk(BIOS_ERR, "IPMI: Unsupported register spacing for SPMI\n");
- /* fall through */
+ __fallthrough;
case 1:
addr.bit_offset = 8;
break;
@@ -369,7 +369,7 @@ static int ipmi_smbios_data(struct device *dev, int *handle,
break;
default:
printk(BIOS_ERR, "IPMI: Unsupported register spacing for SMBIOS\n");
- /* fall through */
+ __fallthrough;
case 1:
register_spacing = 0 << 6;
break;
diff --git a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
index 806e9b20ab..2130e33ccf 100644
--- a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
+++ b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
@@ -301,13 +301,13 @@ static void sn65dsi86_bridge_valid_dp_rates(uint8_t bus, uint8_t chip, bool rate
default:
printk(BIOS_ERR, "Unexpected max rate (%#x); assuming 5.4 GHz\n",
(int)dpcd_val);
- /* fall through */
+ __fallthrough;
case DP_LINK_BW_5_4:
rate_valid[7] = 1;
- /* fall through */
+ __fallthrough;
case DP_LINK_BW_2_7:
rate_valid[4] = 1;
- /* fall through */
+ __fallthrough;
case DP_LINK_BW_1_62:
rate_valid[1] = 1;
break;
diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c
index e344df098b..bf224b03e1 100644
--- a/src/ec/google/chromeec/ec_acpi.c
+++ b/src/ec/google/chromeec/ec_acpi.c
@@ -111,7 +111,8 @@ static const char *port_location_to_str(enum ec_pd_port_location port_location)
return "BACK_LEFT";
case EC_PD_PORT_LOCATION_BACK_RIGHT:
return "BACK_RIGHT";
- case EC_PD_PORT_LOCATION_UNKNOWN: /* intentional fallthrough */
+ case EC_PD_PORT_LOCATION_UNKNOWN:
+ __fallthrough;
default:
return "UNKNOWN";
}
diff --git a/src/ec/kontron/kempld/kempld.c b/src/ec/kontron/kempld/kempld.c
index 0489bac042..31d927d029 100644
--- a/src/ec/kontron/kempld/kempld.c
+++ b/src/ec/kontron/kempld/kempld.c
@@ -82,13 +82,13 @@ static void kempld_enable_dev(struct device *const dev)
dev->ops = &kempld_uart_ops;
break;
}
- /* Fall through. */
+ __fallthrough;
case 1:
if (dev->path.generic.subid == 0) {
kempld_i2c_device_init(dev);
break;
}
- /* Fall through. */
+ __fallthrough;
default:
printk(BIOS_WARNING, "KEMPLD: Spurious device %s.\n", dev_path(dev));
break;
diff --git a/src/lib/dp_aux.c b/src/lib/dp_aux.c
index c6e2de2d62..6a925f13f6 100644
--- a/src/lib/dp_aux.c
+++ b/src/lib/dp_aux.c
@@ -20,13 +20,13 @@ enum i2c_over_aux dp_get_aux_cmd(enum aux_request request, uint32_t remaining_af
case I2C_RAW_WRITE_AND_STOP:
if (!remaining_after_this)
return I2C_OVER_AUX_WRITE_MOT_0;
- /* fallthrough */
+ __fallthrough;
case I2C_RAW_WRITE:
return I2C_OVER_AUX_WRITE_MOT_1;
case I2C_RAW_READ_AND_STOP:
if (!remaining_after_this)
return I2C_OVER_AUX_READ_MOT_0;
- /* fallthrough */
+ __fallthrough;
case I2C_RAW_READ:
return I2C_OVER_AUX_READ_MOT_1;
case DPCD_WRITE:
diff --git a/src/lib/edid.c b/src/lib/edid.c
index 41b8031534..06b9ceefc1 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -1183,13 +1183,13 @@ int decode_edid(unsigned char *edid, int size, struct edid *out)
switch (edid[0x13]) {
case 4:
c.claims_one_point_four = 1;
- /* fall through */
+ __fallthrough;
case 3:
c.claims_one_point_three = 1;
- /* fall through */
+ __fallthrough;
case 2:
c.claims_one_point_two = 1;
- /* fall through */
+ __fallthrough;
default:
c.claims_one_point_oh = 1;
}
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 878f729ef9..25a8836c36 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -167,7 +167,8 @@ void payload_load(void)
if (CONFIG(PAYLOAD_FIT_SUPPORT)) {
fit_payload(payload, mapping);
break;
- } /* else fall-through */
+ }
+ __fallthrough;
default:
die_with_post_code(POST_INVALID_ROM,
"Unsupported payload type %d.\n", payload->cbfs_type);
diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c
index a29b9f37ca..629469d48e 100644
--- a/src/mainboard/google/poppy/variants/nami/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nami/mainboard.c
@@ -241,7 +241,7 @@ void variant_devtree_update(void)
case SKU_6_SYNDRA:
case SKU_7_SYNDRA:
pl2_id = PL2_ID_SONA_SYNDRA;
- /* fallthrough */
+ __fallthrough;
case SKU_0_VAYNE:
case SKU_1_VAYNE:
case SKU_2_VAYNE:
diff --git a/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c
index b2a96a236f..393408237f 100644
--- a/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c
@@ -38,7 +38,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
case VOLT1_25: // board is not able to provide this
MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry
printk(BIOS_INFO, "can't provide 1.25 V, using ");
- // fall through
+ __fallthrough;
default: // AGESA.h says in mixed case 1.5V DIMMs get excluded
case VOLT1_35:
FCH_GPIO(184) = 0x08; // = output, disable PU, set to 0
diff --git a/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c
index 4861809ba6..f15db2f8cb 100644
--- a/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c
@@ -39,7 +39,7 @@ static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigP
case VOLT1_25: // board is not able to provide this
MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry
printk(BIOS_INFO, "can't provide 1.25 V, using ");
- // fall through
+ __fallthrough;
default: // AGESA.h says in mixed case 1.5V DIMMs get excluded
case VOLT1_35:
FCH_GPIO(65) = 0x08; // = output, disable PU, set to 0
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 8b5619cfb3..cc820cd949 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -275,7 +275,7 @@ static void devicetree_fill_pei_data(struct pei_data *pei_data)
/* MRC only supports fixed numbers of frequencies */
default:
printk(BIOS_WARNING, "RAMINIT: Limiting DDR3 clock to 800 Mhz\n");
- /* fallthrough */
+ __fallthrough;
case 400:
pei_data->max_ddr3_freq = 800;
break;
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index 9e56c68c08..9d3422786a 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -220,10 +220,10 @@ static int tegra_dc_sor_power_dplanes(struct tegra_dc_sor_data *sor,
case 4:
reg_val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
- /* fall through */
+ __fallthrough;
case 2:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
- /* fall through */
+ __fallthrough;
case 1:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;
@@ -891,10 +891,10 @@ void tegra_sor_precharge_lanes(struct tegra_dc_sor_data *sor)
case 4:
val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
- /* fall through */
+ __fallthrough;
case 2:
val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
- /* fall through */
+ __fallthrough;
case 1:
val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index fe89d147aa..3b0c128d49 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -222,9 +222,10 @@ static int tegra_dc_sor_power_dplanes(struct tegra_dc_sor_data *sor,
case 4:
reg_val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
- /* fall through */
+ fallthrough;
case 2:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
+ fallthrough;
case 1:
reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;
@@ -889,10 +890,10 @@ void tegra_sor_precharge_lanes(struct tegra_dc_sor_data *sor)
case 4:
val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
NV_SOR_DP_PADCTL_PD_TXD_2_NO);
- /* fall through */
+ fallthrough;
case 2:
val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
- /* fall through */
+ fallthrough;
case 1:
val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
break;
diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c
index 877f53daa8..2efe19bd2c 100644
--- a/src/soc/rockchip/rk3288/sdram.c
+++ b/src/soc/rockchip/rk3288/sdram.c
@@ -739,7 +739,7 @@ static void move_to_config_state(struct rk3288_ddr_publ_regs *ddr_publ_regs,
!= PGSR_DLDONE)
;
/* if at low power state, need wakeup first, then enter the config */
- /* fall through */
+ __fallthrough;
case ACCESS:
case INIT_MEM:
write32(&ddr_pctl_regs->sctl, CFG_STATE);
@@ -893,7 +893,8 @@ static void move_to_access_state(u32 chnum)
while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
!= CONF)
;
- /* fall through - enter config next to get to access state */
+ /* enter config next to get to access state */
+ __fallthrough;
case CONF:
write32(&ddr_pctl_regs->sctl, GO_STATE);
while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index f1506bc44f..3c34e98d4d 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -79,7 +79,7 @@ void hudson_enable(struct device *dev)
case PCI_DEVFN(0x12, 0):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_12_0);
- /* fall through */
+ __fallthrough;
case PCI_DEVFN(0x12, 2):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_12_2);
@@ -87,7 +87,7 @@ void hudson_enable(struct device *dev)
case PCI_DEVFN(0x13, 0):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_13_0);
- /* fall through */
+ __fallthrough;
case PCI_DEVFN(0x13, 2):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_13_2);
@@ -95,7 +95,7 @@ void hudson_enable(struct device *dev)
case PCI_DEVFN(0x16, 0):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_16_0);
- /* fall through */
+ __fallthrough;
case PCI_DEVFN(0x16, 2):
if (dev->enabled == 0)
hudson_disable_usb(USB_EN_DEVFN_16_2);
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 9bf928ec56..6a31fbfbf8 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -290,10 +290,10 @@ static void hudson_lpc_enable_childrens_resources(struct device *dev)
switch (var_num) {
case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
- /* fall through */
+ __fallthrough;
case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
- /* fall through */
+ __fallthrough;
case 1:
pci_write_config16(dev, 0x64, reg_var[0]);
break;
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index a082e0ca5a..de88d7c4ba 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -158,10 +158,10 @@ void lpc_enable_childrens_resources(struct device *dev)
switch (var_num) {
case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
- /* fall through */
+ __fallthrough;
case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
- /* fall through */
+ __fallthrough;
case 1:
//pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata
break;
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 784147c917..05543cfe59 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -301,10 +301,10 @@ static void hudson_lpc_enable_childrens_resources(struct device *dev)
switch (var_num) {
case 3:
pci_write_config16(dev, 0x90, reg_var[2]);
- /* fall through */
+ __fallthrough;
case 2:
pci_write_config16(dev, 0x66, reg_var[1]);
- /* fall through */
+ __fallthrough;
case 1:
pci_write_config16(dev, 0x64, reg_var[0]);
break;
diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c
index 1deda72cf0..cfa22280fc 100644
--- a/src/superio/nuvoton/nct5104d/superio.c
+++ b/src/superio/nuvoton/nct5104d/superio.c
@@ -183,7 +183,7 @@ static void nct5104d_init(struct device *dev)
case NCT5104D_GPIO0:
case NCT5104D_GPIO1:
route_pins_to_uart(dev, false);
- /* FALLTHROUGH */
+ __fallthrough;
case NCT5104D_GPIO6:
if (conf->reset_gpios)
reset_gpio_default_in(dev);