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authorMartin Roth <martinroth@chromium.org>2021-08-25 10:15:10 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-09-01 00:52:20 +0000
commit7266c5ec84b49db9e6f2b83fdfb51db2a87ec222 (patch)
treea3d6cbbb7171d1aa0086387c12f97db63519c476 /src/drivers/ti/tps65090
parentff236ef8324273cbed4d9dd63f62e8ae2ec82395 (diff)
soc/amd/common: Change default spi speeds to 33MHz
In CB:56884 we discussed changing the default fast_read speed from 66MHz, which some platforms may not be capable of running, to 33MHz, which should be generally suitable for all platforms. This same change has been applied to the default for all SPI speeds. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Ibf926df6829ffdcbae947aaa245356f219615ce8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57148 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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