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authorMartin Roth <martinroth@chromium.org>2021-08-25 10:15:10 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-09-01 00:52:20 +0000
commit7266c5ec84b49db9e6f2b83fdfb51db2a87ec222 (patch)
treea3d6cbbb7171d1aa0086387c12f97db63519c476
parentff236ef8324273cbed4d9dd63f62e8ae2ec82395 (diff)
soc/amd/common: Change default spi speeds to 33MHz
In CB:56884 we discussed changing the default fast_read speed from 66MHz, which some platforms may not be capable of running, to 33MHz, which should be generally suitable for all platforms. This same change has been applied to the default for all SPI speeds. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Ibf926df6829ffdcbae947aaa245356f219615ce8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57148 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/amd/common/block/spi/Kconfig6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/amd/common/block/spi/Kconfig b/src/soc/amd/common/block/spi/Kconfig
index 8853f6f275..eb67597193 100644
--- a/src/soc/amd/common/block/spi/Kconfig
+++ b/src/soc/amd/common/block/spi/Kconfig
@@ -37,7 +37,7 @@ config EFS_SPI_SPEED
int
range 0 5
default 3 if EM100
- default 0
+ default 1
help
SPI Fast Speed to be programmed by the PSP.
0: 66.66Mhz
@@ -77,7 +77,7 @@ config ALT_SPI_SPEED
int
range 0 5
default 3 if EM100
- default 0
+ default 1
help
SPI ALT Speed to be programmed by coreboot.
0: 66.66Mhz
@@ -91,7 +91,7 @@ config TPM_SPI_SPEED
int
range 0 5
default 3 if EM100
- default 0
+ default 1
help
SPI TPM Speed to be programmed by coreboot.
0: 66.66Mhz