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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-24 08:26:06 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-03 06:13:53 +0200
commit0a38b227c802abbc0dbe966860d6e3521d5475ba (patch)
tree8b654a876bc351ee73337a8c5225b8b52b760ab0 /src/drivers/intel/fsp2_0/silicon_init.c
parentcc5be8b72ba5b072030fdd1d382d7156da43114f (diff)
drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
Display the MTRR values in the following locations: * Before the call to FspMemoryInit to document coreboot settings * After the call to FspMemoryInit * Before the call to FspSiliconInit * After the call to FspSiliconInit * After the call to FspNotify * Before the call to FspNotify added in patch 15855 TEST=Build and run on Galileo Gen2 Change-Id: I8942ef4ca4677501a5c38abaff1c3489eebea53c Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15849 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel/fsp2_0/silicon_init.c')
0 files changed, 0 insertions, 0 deletions