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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-24 08:26:06 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-03 06:13:53 +0200
commit0a38b227c802abbc0dbe966860d6e3521d5475ba (patch)
tree8b654a876bc351ee73337a8c5225b8b52b760ab0 /src/drivers/intel
parentcc5be8b72ba5b072030fdd1d382d7156da43114f (diff)
drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
Display the MTRR values in the following locations: * Before the call to FspMemoryInit to document coreboot settings * After the call to FspMemoryInit * Before the call to FspSiliconInit * After the call to FspSiliconInit * After the call to FspNotify * Before the call to FspNotify added in patch 15855 TEST=Build and run on Galileo Gen2 Change-Id: I8942ef4ca4677501a5c38abaff1c3489eebea53c Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15849 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/drivers/intel')
-rw-r--r--src/drivers/intel/fsp2_0/debug.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c
index 31fba2073f..69982954fc 100644
--- a/src/drivers/intel/fsp2_0/debug.c
+++ b/src/drivers/intel/fsp2_0/debug.c
@@ -11,6 +11,7 @@
#include <console/console.h>
#include <fsp/util.h>
+#include <soc/intel/common/util.h>
/*-----------
* MemoryInit
@@ -20,6 +21,10 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
const struct FSPM_UPD *fspm_old_upd,
const struct FSPM_UPD *fspm_new_upd, void **hob_list_ptr)
{
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
+
/* Display the call entry point and paramters */
if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
return;
@@ -33,6 +38,10 @@ void fsp_debug_after_memory_init(enum fsp_status status,
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
}
/*-----------
@@ -43,6 +52,10 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
const struct FSPS_UPD *fsps_old_upd,
const struct FSPS_UPD *fsps_new_upd)
{
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
+
/* Display the call to FSP SiliconInit */
if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
return;
@@ -54,6 +67,10 @@ void fsp_debug_after_silicon_init(enum fsp_status status)
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
}
/*-----------
@@ -63,7 +80,7 @@ void fsp_debug_after_silicon_init(enum fsp_status status)
void fsp_before_debug_notify(fsp_notify_fn notify,
const struct fsp_notify_params *notify_params)
{
- /* Display the call to FSP SiliconInit */
+ /* Display the call to FspNotify */
if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
return;
printk(BIOS_SPEW, "0x%08x: notify_params->phase\n",
@@ -76,4 +93,8 @@ void fsp_debug_after_notify(enum fsp_status status)
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
}