diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-31 14:02:13 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-08 14:38:28 +0000 |
commit | ad65e8c041b1d375936267bacc578254407e095f (patch) | |
tree | f2a0a29e7b3a354bba1dba5a6003e67d6621b30f /src/cpu | |
parent | df1aea1f2a13ea3fbee6ea2c9d4137ba3ee762b8 (diff) |
cpu: Include <cpu/cpu.h> instead of <arch/cpu.h>
Also sort includes.
Change-Id: Ia4a3807e45777e2a596878fe09e3c80b1fd2704d
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69037
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/amd/pi/00730F01/update_microcode.c | 10 | ||||
-rw-r--r-- | src/cpu/intel/common/common_init.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/common/fsb.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/common/hyperthreading.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/haswell/acpi.c | 9 | ||||
-rw-r--r-- | src/cpu/intel/haswell/haswell.h | 2 | ||||
-rw-r--r-- | src/cpu/intel/hyperthreading/intel_sibling.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/microcode/microcode.c | 2 | ||||
-rw-r--r-- | src/cpu/intel/model_2065x/acpi.c | 9 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/acpi.c | 6 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/bootblock.c | 6 | ||||
-rw-r--r-- | src/cpu/intel/model_206ax/model_206ax.h | 2 | ||||
-rw-r--r-- | src/cpu/intel/slot_1/l2_cache.c | 4 | ||||
-rw-r--r-- | src/cpu/intel/speedstep/acpi.c | 6 | ||||
-rw-r--r-- | src/cpu/intel/speedstep/speedstep.c | 8 | ||||
-rw-r--r-- | src/cpu/intel/turbo/turbo.c | 2 | ||||
-rw-r--r-- | src/cpu/x86/mtrr/xip_cache.c | 4 | ||||
-rw-r--r-- | src/cpu/x86/name/name.c | 2 | ||||
-rw-r--r-- | src/cpu/x86/pae/pgtbl.c | 2 | ||||
-rw-r--r-- | src/cpu/x86/tsc/delay_tsc.c | 2 |
20 files changed, 43 insertions, 41 deletions
diff --git a/src/cpu/amd/pi/00730F01/update_microcode.c b/src/cpu/amd/pi/00730F01/update_microcode.c index 7c15f9b12c..694af3f581 100644 --- a/src/cpu/amd/pi/00730F01/update_microcode.c +++ b/src/cpu/amd/pi/00730F01/update_microcode.c @@ -1,13 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> -#include <arch/cpu.h> -#include <cpu/amd/microcode.h> +#include <cbfs.h> #include <commonlib/helpers.h> #include <console/console.h> -#include <cpu/x86/msr.h> +#include <cpu/amd/microcode.h> #include <cpu/amd/msr.h> -#include <cbfs.h> +#include <cpu/cpu.h> +#include <cpu/x86/msr.h> +#include <stdint.h> /* * Values and header structure from: diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index 9da162d05d..b24f742476 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpigen.h> -#include <arch/cpu.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/msr.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c index 92f88cd19a..c535d5d778 100644 --- a/src/cpu/intel/common/fsb.c +++ b/src/cpu/intel/common/fsb.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> #include <commonlib/helpers.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/fsb.h> #include <cpu/intel/speedstep.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/intel/common/hyperthreading.c b/src/cpu/intel/common/hyperthreading.c index f9170b383a..85c4477e1e 100644 --- a/src/cpu/intel/common/hyperthreading.c +++ b/src/cpu/intel/common/hyperthreading.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <cpu/cpu.h> #include <cpu/intel/common/common.h> -#include <arch/cpu.h> #include <types.h> bool intel_ht_supported(void) diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 5e5fa813c6..1f028c3f3f 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -1,14 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <types.h> -#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> +#include <cpu/x86/msr.h> #include <device/device.h> +#include <types.h> + #include "haswell.h" #include "chip.h" diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index 133a12945d..5697d0f36e 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -3,7 +3,7 @@ #ifndef _CPU_INTEL_HASWELL_H #define _CPU_INTEL_HASWELL_H -#include <arch/cpu.h> +#include <cpu/cpu.h> #include <stdint.h> /* CPU types without stepping */ diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c index 9fde031418..773d8e261c 100644 --- a/src/cpu/intel/hyperthreading/intel_sibling.c +++ b/src/cpu/intel/hyperthreading/intel_sibling.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/hyperthreading.h> #include <device/device.h> #include <option.h> diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index ac9453f461..6f6e2f12d0 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -2,9 +2,9 @@ /* Microcode update for Intel PIII and later CPUs */ -#include <arch/cpu.h> #include <cbfs.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <smp/spinlock.h> diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 9d11ef053d..0409b8adc1 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -1,14 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <types.h> -#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> +#include <cpu/x86/msr.h> #include <device/device.h> +#include <types.h> + #include "model_2065x.h" #include "chip.h" diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 08548c5f45..06913bcdc0 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -1,12 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> +#include <cpu/x86/msr.h> #include <device/device.h> #include <stdint.h> diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c index 6d2e486741..cfbe8aee3d 100644 --- a/src/cpu/intel/model_206ax/bootblock.c +++ b/src/cpu/intel/model_206ax/bootblock.c @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <arch/bootblock.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <arch/io.h> +#include <cpu/cpu.h> +#include <cpu/x86/msr.h> #include <halt.h> +#include <stdint.h> #include "model_206ax.h" diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index 04e463934a..b145523974 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -3,7 +3,7 @@ #ifndef _CPU_INTEL_MODEL_206AX_H #define _CPU_INTEL_MODEL_206AX_H -#include <arch/cpu.h> +#include <cpu/cpu.h> #include <stdint.h> /* SandyBridge CPU stepping */ diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c index fa433660b6..e4f8e9532b 100644 --- a/src/cpu/intel/slot_1/l2_cache.c +++ b/src/cpu/intel/slot_1/l2_cache.c @@ -23,12 +23,12 @@ * Covington-core Celerons do not have L2 cache. */ -#include <stdint.h> -#include <arch/cpu.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/l2_cache.h> #include <cpu/x86/cache.h> #include <cpu/x86/msr.h> +#include <stdint.h> /* Latency Tables */ struct latency_entry { diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index d997ee867c..839fec4185 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -1,13 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <types.h> -#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/fsb.h> #include <cpu/intel/speedstep.h> #include <device/device.h> +#include <types.h> static int determine_total_number_of_cores(void) { diff --git a/src/cpu/intel/speedstep/speedstep.c b/src/cpu/intel/speedstep/speedstep.c index 9235272002..b1b300d903 100644 --- a/src/cpu/intel/speedstep/speedstep.c +++ b/src/cpu/intel/speedstep/speedstep.c @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <types.h> -#include <string.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> +#include <cpu/x86/msr.h> +#include <string.h> +#include <types.h> /** * @brief Gather speedstep limits for current processor diff --git a/src/cpu/intel/turbo/turbo.c b/src/cpu/intel/turbo/turbo.c index 5d84745d55..0b3b782e77 100644 --- a/src/cpu/intel/turbo/turbo.c +++ b/src/cpu/intel/turbo/turbo.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> -#include <arch/cpu.h> #if CONFIG(CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED) static inline int get_global_turbo_state(void) diff --git a/src/cpu/x86/mtrr/xip_cache.c b/src/cpu/x86/mtrr/xip_cache.c index 6ed96af95f..dc3bf2450c 100644 --- a/src/cpu/x86/mtrr/xip_cache.c +++ b/src/cpu/x86/mtrr/xip_cache.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> -#include <program_loading.h> #include <commonlib/region.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/x86/mtrr.h> +#include <program_loading.h> /* For now this is a good lowest common denominator for the total CPU cache. TODO: fetch the total amount of cache from CPUID leaf2. */ diff --git a/src/cpu/x86/name/name.c b/src/cpu/x86/name/name.c index bf62aef298..1b71e5d8e8 100644 --- a/src/cpu/x86/name/name.c +++ b/src/cpu/x86/name/name.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> +#include <cpu/cpu.h> #include <cpu/x86/name.h> #include <stdint.h> #include <string.h> diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index dceeb88af5..e16fa02cb4 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> #include <cbfs.h> #include <commonlib/helpers.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/x86/cr.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index 978a6ee8e9..4253b18dab 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <arch/cpu.h> +#include <cpu/cpu.h> #include <cpu/x86/tsc.h> #include <delay.h> #include <stdint.h> |