summaryrefslogtreecommitdiff
path: root/src/cpu/via/c3
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-01-06 11:08:01 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-01-15 15:27:33 +0100
commitbbf013c38fe76cf9cc107c41c17e4ac432847d28 (patch)
tree016951e204c1444e3958225c522393633c92f37b /src/cpu/via/c3
parent107f72e674a3fbe2cadb24d98bba53f432bc2e0c (diff)
nehalem/sandy/ivy/haswell: Enable WRPROT cache for all of flash
CBFS could start from below 4MB, and should be cacheable for the purpose of early microcode update and CBFS search for romstage file. Change-Id: Ia2a1c6e5fdcc3201fafc8cf5c841cebbbf0b30c9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/4626 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/cpu/via/c3')
0 files changed, 0 insertions, 0 deletions