diff options
| -rw-r--r-- | src/cpu/intel/haswell/bootblock.c | 3 | ||||
| -rw-r--r-- | src/cpu/intel/model_2065x/bootblock.c | 2 | ||||
| -rw-r--r-- | src/cpu/intel/model_206ax/bootblock.c | 2 |
3 files changed, 3 insertions, 4 deletions
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c index e502cfa392..4857f23e69 100644 --- a/src/cpu/intel/haswell/bootblock.c +++ b/src/cpu/intel/haswell/bootblock.c @@ -54,8 +54,7 @@ static void enable_rom_caching(void) msr_t msr; disable_cache(); - /* Why only top 4MiB ? */ - set_var_mtrr(1, 0xffc00000, 4*1024*1024, MTRR_TYPE_WRPROT); + set_var_mtrr(1, CACHE_ROM_BASE, CACHE_ROM_SIZE, MTRR_TYPE_WRPROT); enable_cache(); /* Enable Variable MTRRs */ diff --git a/src/cpu/intel/model_2065x/bootblock.c b/src/cpu/intel/model_2065x/bootblock.c index 3fd3d14cc4..fa8e137c00 100644 --- a/src/cpu/intel/model_2065x/bootblock.c +++ b/src/cpu/intel/model_2065x/bootblock.c @@ -53,7 +53,7 @@ static void enable_rom_caching(void) msr_t msr; disable_cache(); - set_var_mtrr(1, 0xffc00000, 4*1024*1024, MTRR_TYPE_WRPROT); + set_var_mtrr(1, CACHE_ROM_BASE, CACHE_ROM_SIZE, MTRR_TYPE_WRPROT); enable_cache(); /* Enable Variable MTRRs */ diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c index d3579f7471..49c4012eee 100644 --- a/src/cpu/intel/model_206ax/bootblock.c +++ b/src/cpu/intel/model_206ax/bootblock.c @@ -54,7 +54,7 @@ static void enable_rom_caching(void) msr_t msr; disable_cache(); - set_var_mtrr(1, 0xffc00000, 4*1024*1024, MTRR_TYPE_WRPROT); + set_var_mtrr(1, CACHE_ROM_BASE, CACHE_ROM_SIZE, MTRR_TYPE_WRPROT); enable_cache(); /* Enable Variable MTRRs */ |