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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-05 15:41:09 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2022-02-05 07:56:48 +0000
commit7261b5ade5c2035da026837afdb20a7ec1252b19 (patch)
treee1daa5ec08b97a3a18f33057eb8373080146d448 /src/cpu/intel
parent7aea15aa6b59c96a6d4c0c847352dd1c45145c7c (diff)
cpu,nb/intel: Drop remains of LAPIC_MONOTONIC_TIMER
Leftover from using UDELAY_LAPIC on these platforms. Change-Id: I718050925f3eb32448fd08e76d259f0fb082d2d3 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55413 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/cpu/intel')
-rw-r--r--src/cpu/intel/model_1067x/model_1067x_init.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index 3e4de1fa31..33187d754e 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -12,18 +12,6 @@
#include "chip.h"
-static void init_timer(void)
-{
- /* Set the APIC timer to no interrupts and periodic mode */
- lapic_write(LAPIC_LVTT, (1 << 17) | (1 << 16) | (0 << 12) | (0 << 0));
-
- /* Set the divider to 1, no divider */
- lapic_write(LAPIC_TDCR, LAPIC_TDR_DIV_1);
-
- /* Set the initial counter to 0xffffffff */
- lapic_write(LAPIC_TMICT, 0xffffffff);
-}
-
#define MSR_BBL_CR_CTL3 0x11e
static void configure_c_states(const int quad)
@@ -271,9 +259,6 @@ static void model_1067x_init(struct device *cpu)
/* Enable the local CPU APICs */
setup_lapic();
- /* Initialize the APIC timer */
- init_timer();
-
/* Configure C States */
configure_c_states(quad);