From 7261b5ade5c2035da026837afdb20a7ec1252b19 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 5 Jun 2021 15:41:09 +0300 Subject: cpu,nb/intel: Drop remains of LAPIC_MONOTONIC_TIMER MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Leftover from using UDELAY_LAPIC on these platforms. Change-Id: I718050925f3eb32448fd08e76d259f0fb082d2d3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55413 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/cpu/intel/model_1067x/model_1067x_init.c | 15 --------------- 1 file changed, 15 deletions(-) (limited to 'src/cpu/intel') diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index 3e4de1fa31..33187d754e 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -12,18 +12,6 @@ #include "chip.h" -static void init_timer(void) -{ - /* Set the APIC timer to no interrupts and periodic mode */ - lapic_write(LAPIC_LVTT, (1 << 17) | (1 << 16) | (0 << 12) | (0 << 0)); - - /* Set the divider to 1, no divider */ - lapic_write(LAPIC_TDCR, LAPIC_TDR_DIV_1); - - /* Set the initial counter to 0xffffffff */ - lapic_write(LAPIC_TMICT, 0xffffffff); -} - #define MSR_BBL_CR_CTL3 0x11e static void configure_c_states(const int quad) @@ -271,9 +259,6 @@ static void model_1067x_init(struct device *cpu) /* Enable the local CPU APICs */ setup_lapic(); - /* Initialize the APIC timer */ - init_timer(); - /* Configure C States */ configure_c_states(quad); -- cgit v1.2.3