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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-12-23 07:43:01 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2018-12-28 06:41:29 +0000
commit3c0c3619bcd0c6d25bdf5492be6ba8bb2d5bb410 (patch)
tree675abbecd1bc197653e6906e23b449651c23203b /src/cpu/intel/model_2065x
parent8f537442d5d1014e333ed469d0e75a87f12cfbaf (diff)
arch/x86: SSE2 implies SSE support
Change-Id: Ic9ffcfadd0cd41bb033ed2aec9fb98009dd62383 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30394 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/cpu/intel/model_2065x')
-rw-r--r--src/cpu/intel/model_2065x/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig
index 59bb8d8b86..9481917ff8 100644
--- a/src/cpu/intel/model_2065x/Kconfig
+++ b/src/cpu/intel/model_2065x/Kconfig
@@ -10,7 +10,6 @@ config CPU_SPECIFIC_OPTIONS
select ARCH_ROMSTAGE_X86_32
select ARCH_RAMSTAGE_X86_32
select SMP
- select SSE
select SSE2
select UDELAY_TSC
select TSC_CONSTANT_RATE