Revert "Remove FSP Rangeley SOC and mohonpeak board support"

This chip is still being used and should not have been deleted.  It's
a current intel chip, and doesn't even require an ME binary.

This reverts commit 959478a763c16688d43752adbae2c76e7764da45.

Change-Id: I78594871f87af6e882a245077b59727e15f8021a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/11860
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 28 insertions, 0 deletions

diff --git a/src/cpu/intel/fsp_model_406dx/Makefile.inc b/src/cpu/intel/fsp_model_406dx/Makefile.inc
new file mode 100644
index 0000000000..f28e531098
--- /dev/null
+++ b/src/cpu/intel/fsp_model_406dx/Makefile.inc
@@ -0,0 +1,28 @@
+#
+# This file is part of the coreboot project.
+#
+# Copyrignt (C) 2014 Sage Electronic Engineering, LLC.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; version 2 of the License.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc.
+#
+
+ramstage-y += model_406dx_init.c
+subdirs-y += ../../x86/name
+
+ramstage-y += acpi.c
+
+CPPFLAGS_romstage += -I$(src)/cpu/intel/fsp_model_406dx
+# We don't have microcode for this CPU
+# Use CONFIG_CPU_MICROCODE_CBFS_EXTERNAL with a binary microcode file
+# cpu_microcode_bins += ???