diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-20 14:27:09 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-10-24 09:53:26 +0000 |
| commit | 062b92ef654a97648380a1a9a9fe34229ee76e31 (patch) | |
| tree | 0c64f02b62684a040ac0844c8af9c160fcaff1b2 /src/cpu/intel/common/common.h | |
| parent | 10ae1cf2cda38e681849dcc9e6e86ee3330a8b17 (diff) | |
cpu/intel/common: rework code previously moved to common cpu code
Rework the code moved to common code in CB:46274. This involves
simplification by using appropriate helpers for MSR and CPUID, using
macros instead of plain values for MSRs and cpu features and adding
documentation to the header.
Change-Id: I7615fc26625c44931577216ea42f0a733b99e131
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/cpu/intel/common/common.h')
| -rw-r--r-- | src/cpu/intel/common/common.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/cpu/intel/common/common.h b/src/cpu/intel/common/common.h index dd8c2b8a27..fdacd1f74b 100644 --- a/src/cpu/intel/common/common.h +++ b/src/cpu/intel/common/common.h @@ -33,10 +33,16 @@ bool intel_ht_sibling(void); */ void set_aesni_lock(void); +/* Enable local CPU APIC TPR (Task Priority Register) updates */ void enable_lapic_tpr(void); +/* Enable DCA (Direct Cache Access) */ void configure_dca_cap(void); +/* + * Set EPB (Energy Performance Bias) + * Possible values are 0 (performance) to 15 (powersave). + */ void set_energy_perf_bias(u8 policy); #endif |