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authorKane Chen <kane.chen@intel.com>2017-10-11 12:39:46 +0800
committerMartin Roth <martinroth@google.com>2017-10-16 00:20:07 +0000
commit6708d3abc744d3d51472ef0028f9a7ad96fd8f11 (patch)
tree7b5ea32e2477bdd9ae4bbc30d6085804eb1dca5b /src/console/early_print.c
parentec1a24ca02221daeef521ccc8d934a7e0abb7ae5 (diff)
mb/google/fizz: enable AER for PCIe root ports
Enable PCIe Advanced Error Reporting for PCIe root port 2, 3, 4 ,8. BUG=b:64798078 TEST="lspci" shows that AER is enabled in the capabilities list. Change-Id: I6438250d674e7d06cdecd8f25fadebca1973721e Signed-off-by: Kane Chen <kane.chen@intel.com> Reviewed-on: https://review.coreboot.org/21946 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/console/early_print.c')
0 files changed, 0 insertions, 0 deletions