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authorLi, Jincheng <jincheng.li@intel.com>2023-03-01 18:25:49 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-03-26 10:14:23 +0000
commit969f04fb345506621c5d1d6eb8dff558688285b5 (patch)
tree8e6577b6b6a8a2840b41fc6e70cfe4cdc2f24313 /src/arch
parent31998020458af821cb61d0000ee2cbd0293958f6 (diff)
soc/intel/xeon_sp: Update FSP-T UPD for FSP2.4
FSP2.4 and previous FSP versions have different FSP-T UPD parameter settings. Change-Id: I48384944ac69636cca2acd8169d3dd15f90362ec Signed-off-by: Li, Jincheng <jincheng.li@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81313 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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